Insulation ability is critical essential for medium-voltage power module, which is strongly affected by the internal electric field concentration. This paper establishes a comprehensive study on the electric field coupling effects of power module considering the interaction between silicon carbide (SiC) chip and package structure. Technology Computer-Aided Designer (TCAD) simulation is carried out to analyze the insulation weak points under high voltage stress (>10kV), resulting that electric field concentration at the interfaces between the encapsulation material and the termination region as well as the die outer edge with the maximum electric field strength value of 2.0*10^7V/m contribute most to the insulation degradation. Optimization design is therefore proposed to enhance the insulation ability by coating polyimide on the surface of chip and DBC. Finally, 10kV SiC power module with optimization design is fabricated and partial discharge (PD) test is conducted to verify the coupling effects between chip and package as well as the insulation improvement of optimization design, resulting in the apparent charge of 1.16 pC and only one PD pulse beyond 10pC through optimization.