The dc-dc multiphase series-capacitor (SC) buck converter is a promising single-stage candidate for efficiently stepping-down the increasingly common 48V rack-level distribution bus voltage directly to the core voltage of emerging microprocessors. Although there are multiple benefits to increasing the SC buck inductor-count, the corresponding dynamic performance becomes increasingly degraded due to the decreasing inductor rising-current slew-rate. This paper introduces a topological modification to the conventional SC buck that adds a new higher voltage level to each inductor switching-node, where the conventional topology would otherwise only provide two levels. Derived from existing platform-level intermediate bus converters, this third voltage level increases the total combined inductor rising-current slew-rate, significantly improving the light-to-heavy load-transient response, all while maintaining the static-efficiency benefits of the SC buck. Minimum deviation and time-optimal transient response improvements are shown in simulation, and functionality is proven with a discrete 11-phase, 48V-to-1V prototype.
