Silicon Carbide MOSFET’s offer reduced switching losses and faster switching speeds when compared to Silicon IGBT’s, however the use of these devices in medium to high power applications has been limited due to their comparably low module current ratings. This paper investigates a topology for paralleling Silicon Carbide MOSFET half bridge modules, allowing for increased current capabilities while facilitating effective sharing between devices, a widely reported issue that can result in thermal runaway and device failure. This topology comprises of a combination of delay based active gate driving and current limiting inter-device inductances, with a comprehensive overview of the current balancing mechanism detailed. Two distinct control strategies for this topology, ‘fixed delay’ and ‘variable delay’, are presented and analysed. These were both experimentally tested with 2 modules at 800 A, with the variable delay strategy demonstrated overcoming an imbalance of 80 A and the fixed delay strategy shown balancing 4 modules at 1600 A.