Active gate drivers (AGDs) are emerging technologies to drive SiC MOSFETs for further enhancing the power converter’s efficiency and Electromagnetic Compatibility (EMC) performance, as they can generate precise gate waveforms to minimize current overshoot and oscillation in the driven SiC MOSFETs. This paper is focused on developing a Closed Loop Digital Design (CLDD) method to unleash AGDs’ full potential by optimizing the efficiency, and EMI of using SiC MOSFETs in power converters. The CLDD design method comprises four stages: characterization, modeling, optimization, and verification. Preliminary results present the characterization and modeling stages by conducting double pulse testing on the SiC MOSFET using a bespoke AGD at a drain voltage of 400 V and drain current of 10 A. An artificial neural network (ANN) based optimization optimizes the gate-driving waveforms. The result demonstrates the successful damping of the drain current oscillation and overshoots during the turning on of the SiC devices while maintaining a favorable switching loss. Compared to traditional design methods, this also gives a fast and accurate design method for AGD-based power converters.
