This work describes the analysis and design of a 250W Totem Pole Power Factor Correction (PFC) circuit with Gallium Nitride (GaN) based devices in the power stage. The solution uses a continuous conduction mode control approach with an analog controller which generates a single pulse-width modulated (PWM) output. This PWM output is then processed using external circuits to drive the slow and fast leg of the totem pole PFC topology. The fast leg of the power stage uses an integrated System-in-Package (SiP) with two 650V GaN High Electron Mobility Transistors (HEMT) in a half bridge configuration. The SiP includes dedicated gate drivers and all the protection required for GaN HEMT. The slow leg which is modulated at line frequency uses high voltage Silicon Field Effect Transistors (FET). The system requirements, design equations, simulation results, and hardware prototype of the PFC and the associated external circuits are presented in the subsequent sections of this paper.
